Selective Harmonics Reduction for Phase Lock Loop Utility Application

The analysis and design of the phase-locked loop (PLL) system is presented for the phase tracking system of the single phase utility interface inverters Phase-locked loops (PLL) are widely used in power electronics equipment connected to the mains. The use of a square wave voltage-controlled oscillator instead of a sinusoidal one eliminates one multiplier, resulting in a simple PLL algorithm, suitable for low-cost processors. In spite of its simplicity, distorted grid voltages cause steady-state phase error. This project proposes the use of a modified square waveform obtained by the selective harmonics elimination (SHE) method to solve the phase error problem.